Paul Fischione
Paul Fischione has served as Chief Executive Officer of Fischione Instruments since 1986. He holds numerous U.S. and international patents and has authored an extensive body of technical publications. During his decades in the electron microscopy field, he has served in key roles across multiple professional organizations, including Treasurer of the International Federation of Societies for Microscopy. He is a Fellow of the Microscopy Society of America and was recognized as an Ernst & Young Entrepreneur of the Year in 2013. Mr. Fischione is a graduate of the University of Pittsburgh.
Session
We present a new instrumentation for automated argon ion beam delayering of semiconductor devices that achieves nanometer-scale surface uniformity over millimeter-scale areas [Model 1064 ChipMill, Fischione Instruments]. Conventional delayering methods, including FIB and mechanical polishing, are limited by small processing areas, insufficient uniformity for thin layers (<200 nm), and potential sample damage. The presented system enables uniform delayering across areas up to 10 mm in diameter, providing high-quality surfaces for imaging and electrical characterization.
The instrument integrates a high-vacuum argon ion source (up to 10 keV) with a scanning electron microscope (SEM), backscattered electron detector (BSE), secondary electron detector, energy-dispersive X-ray spectroscopy (EDS), and an optical camera for in situ monitoring. A closed-loop feedback algorithm collects BSE images and EDS maps across the delayered area, calculates surface uniformity, and then dynamically adjusts the ion milling parameters to maintain nanometer-level planarity – independent of layer composition or device geometry.
Demonstration on an Apple A12 processor achieved surface uniformity within ±20 nm over a 5 mm diameter area and exposed multiple metal and dielectric layers in a single delayered plane. Critical subcomponents – including central processing unit, neural processing unit, caches, and interconnects – were clearly resolved, enabling detailed layer-specific analysis and vertical interconnect characterization.
This instrumentation provides a reproducible, scalable platform for large-area delayering and supports layer-resolved electrical probing, failure analysis, and reverse engineering of complex, multi-level semiconductor hardware. It enables uniform material removal and nanoscale surface flatness for advanced device analysis.