From Silicon to Netlist: Systematizing Two Decades of Research on IC, FPGA, and Netlist Reverse Engineering
Over the past two decades, the volume of academic research on Integrated Circuit (IC), Field-Programmable Gate Array (FPGA), and netlist reverse engineering has steadily grown. However, knowledge remains fragmented across domains and communities, which complicates assessing the state of the art and hampers identifying shared research challenges.
Therefore we systematized the knowledge based on an in-depth analysis of 187 peer-reviewed publications. We also analyzed all 30 artifacts from our corpus using established artifact evaluation practices, and we identified that key results could be reproduced for only seven publications (4%). Using the corpus, we further characterized technical and organizational challenges that impede research progress. Based on our findings, we derive stakeholder-centric recommendations for academia, industry, and government to enable more coordinated and reproducible HRE research. These recommendations target three cross-cutting opportunities: (i) improving reproducibility and reuse via artifact-centric practices, (ii) enabling rigorous comparability through standardized benchmarks and evaluation metrics, and (iii) improving legal clarity for public HRE research.