Security is built in layers. Each time more eyes are on a layer, more issues are found which improves the next product generation. Unfortunately, ASIC design and fabrication has traditionally been opaque leading to one of the few areas where "security through obscurity" still persists. Worse, the closed nature of these designs incentivizes vulnerability concealment over remediation.

The rise of mature FOSS EDA tools changes everything. For the first time, we can build fully open source security hardware, making designs that can be audited, reproduced, and vetted at every layer of the stack. Projects like OpenTitan and Caliptra are already demonstrating that open secure elements aren't just academic curiosities but actually shipping.

We'll examine what full-stack transparency buys you in terms of security assurance, where the open ecosystem still has gaps, and what it will take to make FOSS the default.

The future of hardware security is open. Let's build it together.

For two decades, reverse engineering has evolved from a niche manual craft into a foundational pillar of security assurance. Yet, as the two impulse talks at the beginning of this session have shown, the field currently stands at a crossroads. While we look upon years of research and hundreds of technical methods, the practical reality is a landscape of fragmented prototypes, low reproducibility, and significant "translation friction" between academic theory and industry application.

This panel discussion moves beyond the "what" of reverse engineering to confront the "how" of its future. We bring together a diverse cohort of experts to bridge the gap between academic success, open-source mindset and contributions, and industry-grade workflows. This panel will discuss a range of ongoing challenges and their potential for tension between stakeholders, but also promising solutions, all to aim for a future where automated netlist analysis is not just a research possibility, but a reliable, scalable, and trustworthy reality.