Dr. Andrew Zonenberg is a principal security consultant at IOActive's Seattle hardware lab where he works on both silicon and general embedded security projects. He is a frequent speaker on semiconductor reverse engineering and hardware hacking at security conferences across North America and Europe.
- Anti-RE Countermeasures in a Real Secure Element
- Assessment of a Real World Analysis Project in 40 nm Technology
- CPU Microscopy and Reverse Engineering on a Budget
- IC Reverse Engineering Sample Preparation
- IC Reverse Engineering Sample Preparation
- SAMSEM – A Generic and Scalable Approach for IC Metal Line Segmentation
Dr. Deruo Cheng is a Research Scientist with Nanyang Technological University, Singapore. His research interests include hardware security, digital forensics, image processing, multi-modal imaging, and machine learning.
- SAMSEM – A Generic and Scalable Approach for IC Metal Line Segmentation
- LFI as Hardware Reverse-Engineering Tool
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- Tamper-Sensing Meshes in the Wild
- The Future of Hardware Security is Open
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- The Future of Netlist Reverse Engineering Tooling
- Hardware Trojans from Invisible Inversions: On the Trojanizability of Standard Cell Libraries
- Advanced Semiconductor Failure Analysis using in-situ AFM-in-FIB/SEM
- CPU Microscopy and Reverse Engineering on a Budget
- Improving Large Area Delayering using Local Mechanical Manipulation
- Accelerate and Improve Circuit Extraction Reliability by Vector Data Optimization Efficient on Advanced Technology ICs
- NVM Extraction Using Fully Invasive-Attack
- NVM Extraction Using Fully Invasive-Attack
Paul Fischione has served as Chief Executive Officer of Fischione Instruments since 1986. He holds numerous U.S. and international patents and has authored an extensive body of technical publications. During his decades in the electron microscopy field, he has served in key roles across multiple professional organizations, including Treasurer of the International Federation of Societies for Microscopy. He is a Fellow of the Microscopy Society of America and was recognized as an Ernst & Young Entrepreneur of the Year in 2013. Mr. Fischione is a graduate of the University of Pittsburgh.
- Automated Large-Area Argon Ion Beam Delayering with Nanometer-Scale Planarity
- The role of open-source silicon for the PQC migration
René Walendy hacks hardware for science. As a PhD researcher at the Max Planck Institute for Security and Privacy and Ruhr University Bochum, he explores how humans reverse engineer chips, how to make that smarter, and where current tooling and training fall short. His work combines hands-on attack scenarios with controlled studies, using open research platforms like ReverSim to bring scientific rigor into traditionally opaque reverse engineering workflows.
Beyond the lab, René regularly speaks at academic and hacker conferences, including Chaos Communication Congress and ACM CHI, and teaches hands-on training sessions at venues like Hardwear.io. He works to bring hardware security closer to the broader security community, bridging the gap between traditional security disciplines and low-level silicon hacking.
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA. His research focuses on security aspects of chip design.
- REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography
Shivam Bhasin is a Principal Research Scientist and Programme Manager (Cryptographic Engineering) at Centre for Hardware Assurance, Temasek Laboratories, Nanyang Technological University Singapore.
He received his PhD in Electronics & Communication from Telecom Paristech in 2011, Advanced Master in Security of Integrated Systems & Applications from Mines Saint-Etienne, France in 2008. Before NTU, Shivam held position of Research Engineer in Institut Mines-Telecom, France. He was also a visiting researcher at UCL, Belgium (2011) and Kobe University (2013). His research interests include embedded security, trusted computing and secure designs. He has co-authored several publications at recognized journals and conferences. Some of his research now also forms a part of ISO/IEC 17825 standard.
- Out of Order, Not Out of Reach: Reality Check on AES Side-Channel Attacks on ARM Cortex-A72
- Retrieval-Augmented Generation (RAG)-powered Large Language Model (LLM) system for Recovered IC Netlist Analysis
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- A Brief Introduction to Circuit-Level Hardware Reverse Engineering
- The Future of Netlist Reverse Engineering Tooling
- LFI as Hardware Reverse-Engineering Tool
- The Cloneless Series of Open-Source ASICs for Attack-based Security Evaluation
- Accelerate and Improve Circuit Extraction Reliability by Vector Data Optimization Efficient on Advanced Technology ICs
- Precision Sample Preparation of Advanced Packages Using Atmospheric Microwave-Induced Plasma for Hardware Reverse Engineering and Security Assessment
- From Silicon to Netlist: Systematizing Two Decades of Research on IC, FPGA, and Netlist Reverse Engineering