The RESEC (REconstruction of highly integrated SECurity devices) project is a comprehensive initiative that tackles the pressing concerns of malicious modification and intellectual property (IP) piracy in globally distributed supply chains. The primary goal of this project is to develop, verify, and optimize a complete reverse engineering process for integrated circuits manufactured in technology nodes of 40 nanometers and below. This talk highlights the significant contributions of the RESEC project in the areas of sample preparation, computer vision, and netlist analysis, thereby extending the state-of-the-art in hardware reverse engineering. The project results are expected to have a profound impact on the development and physical verification of trusted chips.