A dedicated system has been developed to uniformly sputter the interconnect layers of a semiconductor integrated circuit (IC) while measuring the process status by tracking the ultraviolet (UV) photon generation. The best method to large scale full chip delayering of advanced node semiconductors (14nm and smaller) is to approach the task from the substrate side of the device. The delayering workflow begins with precision mechanical thinning of the silicon substrate in package or separated die to below 5 microns of remaining silicon thickness (RST). In addition to enabling the visualization of the transistor structure very early in the deprocessing workflow, this also allows examination of the highest resolution and most important metal interconnects and vias first. In this process, a focused low kV argon ion beam is scanned across the sample surface in combination with surface water dosing to address challenges associated with sputtering heterogeneous surfaces like copper and silicon oxide.

The circuit interconnect and via layers can be sequentially removed using chemically assisted focused ion beam (FIB) sputtering in combination with characteristic ultraviolet photon collection for process endpoint monitoring. Ion sputtered materials generate photons with characteristic energies, such as copper (325nm), silicon (250 nm), and aluminum (395 nm) that are easily measured. This technique was a well-established FIB technique and previously investigated for circuit editing applications. Water dosing hardware improvements over traditional FIB gas injection are employed to efficiently deliver the chemistry uniformly over large sample areas. The use of water during deprocessing enhances the UV photon generation allowing for improved signal to noise during processing. The use of large spot (200um) focused scanning argon beam also allows for the targeting of specific functional blocks in the device for intellectual property and forensic applications.