This talk introduces NetCracker, an open-source framework for analyzing and reverse-engineering FPGA routing architectures. NetCracker leverages readily available data from vendor CAD tools to facilitate combinatorial and statistical analyses of FPGA routing networks. Its modular design supports user-defined analysis passes, making it adaptable to diverse FPGA architectures and research applications.

Using NetCracker, we present a detailed analysis of the AMD/Xilinx 7-Series routing architecture, examining switch-box diversity, channel composition, and internal connectivity. We uncover key design patterns, such as the dominance of short-range connections and the absence of intermediate taps on many wire types—features that challenge traditional academic assumptions. We highlight unique routing configurations, including bidirectional long wires and unconventional diagonal connections, shedding light on architectural trade-offs that optimize routing efficiency and resource utilization.

This work bridges a critical gap between academic research and industrial practices by systematically exposing FPGA architectural details. It aims to inspire further research in hardware reverse engineering while supporting innovation in future FPGA architectures.